fig4

Figure 4. Fully soft logic gates based on the Schottky diode. (A) Schematic illustration of the fully soft OR gate; (B) Circuit diagram of the fully soft OR gate; (C) Optical images of the fully soft OR gate before strain (left) and after strain (right); (D-F) V_in and V_out of the fully soft OR gate under mechanical strains of 0% (D), 30% (E), and 0% (released) (F); (G) Schematic illustration of the fully soft AND gate; (H) Circuit diagram of the fully soft AND gate; (I) Optical images of the fully soft AND gate before strain (left) and after strain (right); (J-L) V_in and V_out of the fully soft OR gate under mechanical strains of 0% (J), 30% (K), and 0% (released) (L). V_in: Input voltage; V_out: output voltage; GND: ground.